FIG. 1 shows a high-level block diagram of a conventional spread-spectrum receiver 100 of the prior art. Those skilled in the art will understand that certain elements such as filters, amplifiers, attenuators, oscillators, synthesizers, and the like have been omitted from this figure, as well as from other figures of receivers in this application.
As indicated in FIG. 1, receiver 100 receives a radio frequency (RF) spread-spectrum input signal 102 from an antenna. Mixer 104 downconverts input signal 102 from RF to an intermediate frequency (IF) using RF-to-IF mixing signal 106 to form IF signal 108. Analog-to-digital converter (ADC) 118 converts analog IF signal 108 into a digital IF signal 120. Using IF-to-baseband mixing signal 122, digital downconverter 124 downconverts IF signal 120 into a baseband signal 126. Digital (e.g., low-pass) filter 128 filters baseband signal 126, e.g., to filter out undesirable interference from other signals, to generate filtered signal 130, which is then subjected to further digital processing 132 (e.g., de-spreading/demodulation) to generate digital incoming data signal 134.
In a typical spread-spectrum receiver, such as receiver 100, errors can result from such phenomena as thermal noise from analog processing prior to the A/D conversion, non-coherent on-channel interference, and off-channel interference. It is assumed that digital filter 128 has a sufficient number of taps to reject off-channel interference prior to demodulation and provide a desired signal level above sensitivity to digital processing 132. Under these conditions, the level of interference that can be tolerated at the A/D conversion step is determined by the thermal noise and the dynamic range of ADC 118. Here, dynamic range is defined as the difference in dB between the full-scale ADC input level and the quantization-noise floor level, where the quantization-noise floor level is determined by the least significant bit (LSB) of the ADC.
The ADC dynamic range DR for first Nyquist zone sampling can be expressed by Equation (1) as follows:DR(dB)=6*N+1.76+10*log(BWN/BWS),  (1)where N is the number of effective bits in the ADC (i.e., typically one fewer than the total number of bits), BWN is the Nyquist bandwidth (i.e., one-half the sample clock frequency), and BWS is the desired signal bandwidth. For a 14-bit ADC (with 13 effective bits) operating with a 61.44-MHz sample clock and a 3.84-MHz wide UMTS signal bandwidth, the dynamic range DR is 88.8 dB. In practice, sampling is performed at higher Nyquist zones, where there are additional noise contributions that reduce the dynamic range somewhat.
FIG. 2 shows a graphical representation of the relative levels of thermal noise, quantization noise, and a desired signal level for a 14-bit ADC receiving a UMTS signal at a signal-to-thermal-noise ratio (SNtR) of 0 dB, where the SNtR is proportional to the log of (signal power/thermal noise power). As indicated in FIG. 2, for 10 dB of thermal noise, 78.8 dB of ADC headroom is provided, where ADC headroom is defined as the difference in dB between the full-scale ADC input level and a specified desired signal level (in this case, at 18 dB above sensitivity).
FIG. 3 shows a graphical representation of the relative signal and noise levels for the same 14-bit ADC when 75 dB of off-channel interference is introduced into the receiver above the desired signal level. Because the 14-bit ADC has 78.8 dB of headroom, this relatively large off-channel interference can be tolerated without overflowing the ADC. It is assumed that the off-channel interference can be sufficiently removed by digital filter 128 after the A/D conversion to enable satisfactory digital processing 132.
FIG. 4 shows a graphical representation of the relative signal and noise levels when receiver 100 is implemented using a 12-bit ADC instead of a 14-bit ADC for an SNtR of 0 dB. According to Equation (1), the ADC dynamic range DR is only 76.8 dB, and the ADC headroom is only 66.8 dB for first Nyquist zone sampling for a 12-bit ADC (with 11 effective bits) operating with a 61.44-MHz sample clock and a 3.84-MHz wide UMTS signal bandwidth.
FIG. 5 shows a graphical representation of the relative signal and noise levels for the 12-bit ADC of FIG. 4, when the same 75 dB off-channel interference of FIG. 3 is introduced. Here, the 66.8 dB of ADC headroom is insufficient to tolerate such relatively large off-channel interference, and the ADC will overflow, resulting in undesirable data errors downstream.